| 摘要: |
| 选用在系统可编程大规模集成ispLS11032-70PLCC84芯片作硬件电路,以Lattice Expert7.1作EDA设计工具,设计一种新型数字频率计,该频率计采用ABEL-HDL对其中的各部分元器件进行编程,实现了闸门控制电路、计数电路、多路选择电路、位选电路、段选电路等。频率计的测频范围:1Hz~70 MHz..该设计方案通过了软件仿真、硬件调试和软硬件综合测试。 |
| 关键词: 数字频率计 复杂可编程逻辑器件 硬件描述语言 |
| DOI： |
| 投稿时间：2002-06-28 |
| 基金项目: |
|
| Design of Digital Cymometer Based on Complex Programmable Logic Device |
|
Pan Ming
|
| (Department of Computer, Guilin Institute of Electronic Technology, Guilin, 541004) |
| Abstract: |
| Lattice Expert 7.1 is used successfully to make a new-type digital cymometer with a Complex Programmable Logic Device (CPLD) used as virtual kernel of the cymometer,and a large programmable logic device (ispLSI1032E) used as hardware circiuit. The one chip includes strobe control circuit,count circuit,multi-choice circuit,bit-choice circuit, segment-choice circuit which are designed by ABEL-HDL.The frequency is designed from 1 Hz to 70 M Hz. The whole system passes the debugging in software simulation, software and hardware parts. |
| Key words: digital cymometer complex programmable logic device hardware description language |
